1. Field of the Invention
Embodiments of the present invention generally relate to an apparatus and method for physical vapor deposition (PVD) and particularly to an improved PVD target and method of operating the same.
2. Description of the Related Art
The manufacture of flat panel displays, solar panels, and semiconductor devices relies on methods for the deposition of metallic and non-metallic thin films on a substrate. PVD is one such method.
PVD is generally performed in a high vacuum chamber and typically involves a magnetron sputtering process. Sputtering is performed by placing a target above the substrate, introducing a gas, such as argon, between the target and the substrate, and exciting the gas with a high-voltage DC signal to create ions that strike the target. The target consists of a material that is to be deposited as a thin film on the substrate. As the target is bombarded by ions, target atoms are dislodged and become deposited onto the substrate. The dislodged target atoms generally have substantial kinetic energy and when they impact the substrate the atoms tend to strongly adhere to the substrate. Magnetron sputtering further involves the placement of rotating or linearly translating magnets or magnet assemblies adapted to increase the plasma density in the PVD chamber and, hence, the deposition rate of the target material onto the substrate.
In some applications, e.g., the processing of large-area substrates, the PVD target is mounted onto a backing plate, for example to enhance the structural rigidity of the target. PVD target assemblies adapted to process large-area substrates are significantly different in design from target assemblies adapted to process 200 mm and 300 mm silicon wafers, due to factors related to substrate size. For example, target bowing, deposition uniformity, and thermal issues are considerations related to processing large-area substrates. As used herein, the term “large-area substrates” refers to substrates with a surface area, or “footprint” of about 1,000,000 mm2 and larger and/or having one side that is at least 1 meter in length. The term “footprint”, as used herein, refers to the nominal surface area of a substrate or target and not to the wetted surface area, i.e., the total surface area of all sides and surfaces combined. For example, a 1,000 mm×1,000 mm target has a nominal size of 1,000,000 mm2, but a substantially higher wetted surface area, which includes the top and bottom surfaces and side edges.
The target is typically mounted to the backing plate via a bonding layer disposed therebetween, such as an adhesive elastomeric layer or a layer of solder. Issues associated with using a bonding layer to mount a PVD target to a backing plate include exposure of sensitive regions of the interior of the chamber to unwanted contamination, the presence of arc-inducing features related to the bonding layer, and poor electrical conductivity of the bonding layer affecting flow of electrical energy to the target.
FIG. 1 illustrates a conventional PVD chamber 100 in a schematic cross-sectional view. PVD chamber 100 includes a target assembly 110, a chamber body 120, a substrate support 130, a shield 140, a magnet assembly 150 and a processing region 160.
Target assembly 110 includes a target 111, which is bonded to a backing plate 112 by a bonding layer 113. A DC power connection 114 is electrically coupled to backing plate 112. Bonding layer 113 bonds target 111 to backing plate 112 and provides an electrically conductive path therebetween, allowing target 111 to be energized through backing plate 112 during the PVD process. Bonding layer 113 may be an elastomeric bond or a solder bond.
Substrate support 130 positions a substrate 131 adjacent the processing region 160 of PVD chamber 100 during PVD processing. Shield 140, also referred to as a dark space shield, is positioned inside PVD chamber 100 and proximate target sidewall 115 to protect the inner surfaces of body 120 and target sidewall 115 from unwanted deposition. Shield 140 is positioned very close to target sidewall 115 to minimize re-sputtered material from being deposited thereon. In addition, shield 140 is generally grounded electrically. Because of this, arcing between target 111, which is at a high voltage, i.e., approximately 300 to 500 V, and shield 140 can easily occur. Arcing is more likely to occur when any sharp point is present on the surface of target sidewall 115, since the charge density of an electric field proximate a charged conductor, i.e., the intensity of the electric field, is much higher near a sharp point on the charged conductor. Arcing is to be avoided at all times in a PVD chamber due to the large number of substrate-contaminating particles generated thereby as well as the potential for damaging conductive pathways already formed on a substrate.
FIG. 2A is a partial cross-sectional view of the region indicated in FIG. 1 of PVD chamber 100. In the example shown, bonding layer 113 is an elastomeric bonding layer, which may be used for mounting target 111 to backing plate 112. The inventors have discovered one problem with using an elastomeric material for bonding layer 113, namely the presence of voids 117, 118 that are typically inside bonding layer 113. When PVD chamber 100 is pumped down to vacuum, voids 117, 118, which contain air and/or other gases at atmospheric pressure, may burst into PVD chamber 100, contaminating both the processing region 160 and surfaces exposed thereto, including target sidewall 115, shield face 141, and substrate 131. Void bursting may take place during the initial pump-down of PVD chamber 100 or, due to the thermal cycling of target assembly 110 associated with processing substrates, throughout the life of target assembly 110.
Contamination of processing region 160 during PVD processing of a substrate may deleteriously affect the substrate by damaging devices formed thereon or by encouraging subsequent delamination of the PVD-deposited layer from the substrate. In addition, contamination of other surfaces in PVD chamber 100 may result in contamination of many substrates over the life of target assembly 110. This longer-term contamination problem is caused by particles of PVD-deposited material flaking off of shield face 141 and target sidewall 115 when a layer of bonding layer contaminants are present thereon.
During the PVD process, any surfaces in line-of-sight of the target face 119 of target 111 will have target material deposited thereon, such as substrate 131 and shield 140. In addition, surfaces not directly in line-of-sight of target face 119 may also undergo PVD deposition due to “re-sputtering” of material from surfaces such as shield face 141. In this way, target sidewall 115 also has material from target 111 deposited thereon although not in line-of-sight of target face 119. In either case, adhesion between a surface, e.g., shield face 141 or target sidewall 115, and the layer of deposited PVD material must be maximized. The presence of any contaminant on such surfaces, for example from void bursting, substantially reduces the adhesion between said surfaces and the deposited material, thereby producing substrate-contaminating particles.
The inventors have discovered another problem associated with the bonding layer 113, which is arcing between target 111 and shield face 141. The presence of a sharp point or feature on the surface of a charged conductor results in a relatively intense electric field. In the case of target 111, which is maintained at a high voltage during the PVD process, this may result in arcing between the sharp feature on target 111 and shield face 141, which is typically grounded. When a bonding layer 113 is used to mount target 111 to backing plate 112, it is difficult to provide a smooth transition surface between target 111 and backing plate 112 and, hence, may include arc-inducing features.
For example, void bursting from bonding layer 113 may form a sharp point near shield face 141. FIG. 2B is a partial cross-sectional view of the region indicated in FIG. 1 of PVD chamber 100 after void 117 (shown in FIG. 2A) has burst into processing region 160. A gap 117A is formed thereby between target 111 and backing plate 112, creating a sharp point 116 proximate shield face 141, which encourages arcing. When bonding layer 113 is a solder bond, arcing may be caused by rugosities in the surface of the solder bond. Arcing may also be caused by regions of incomplete solder coverage between target 111 and backing plate 112, which may form a gap similar to gap 117A and a sharp point 116.
Therefore, there is a need for an improved PVD target and method of operating the same.